Worth a Read
Two Roads Out of the Memory Squeeze: CMX vs CXL
I/O Fund's follow-up maps the two architectures competing to lift tokens per watt: Nvidia's proprietary CMX rack and the open CXL standard. Same metric, two capture paths — and the stock-level torque sits with the smaller names. The cut, and the Closelooknet cross-read.
Source: I/O Fund Read the original →
The first piece made the case that tokens per watt is the inference income statement; this one asks which hardware collects the toll for improving it. Path one is Nvidia's CMX: an SSD-based enclosure lashed to Rubin GPUs and Vera CPUs over Spectrum-X Ethernet, with 64 BlueField-4 DPUs and roughly 9,600 TB of flash per rack, orchestrated by a software stack (DOCA, Dynamo, NIXL) that decides which tier of memory holds the KV cache at any moment. Nvidia's claims for the KV-cache workload: up to 5× token throughput and 5× power efficiency. An STX reference design lets storage vendors build compatible enclosures — a modular revenue stream that rides GPU utilization rather than GPU units.
Path two is Compute Express Link — the open, vendor-agnostic standard built on PCIe, whose data rates have risen 16× since 2019 to 512 GB/s. The flag-carrier in the piece is Marvell: Structera CXL controllers running near 30 watts against the 150–700 watts of adding CPUs or GPUs for their memory, a cited 4.8× throughput gain on a 16 TB pooled tier, and an 82.7% cut in time-to-first-token. Adoption is ahead of usage: two-thirds of servers were already CXL-capable in early 2025, over 90% projected by end-2026, while actual CXL-enabled deployments remain near zero — the gap that makes it an inflection rather than a run-rate story. Marvell guides its CXL line toward $1 billion by 2028; UBS gets there a year earlier.
The investment asymmetry is the point of the piece. I/O Fund reads CMX as likely to gain traction without being a stock catalyst — at Nvidia's market capitalization, another revenue stream dilutes into scale — while CXL's gains land on much smaller bases, where an emerging memory-pooling franchise can move the number. The tell that both roads stay open: Nvidia's own Vera CPU supports CXL 3.1, letting operators scale memory without deepening their lock-in. And Google's TPU pods, sharing 331.8 TB of HBM pod-wide, already validate the pooled-memory idea the standard is chasing.
The core idea One metric, two capture paths: the proprietary rack folds the gains into an ecosystem already priced in the trillions, while the open standard hands the same gains to names small enough for the revenue to matter.
That asymmetry is a familiar pattern from earlier build-out phases: the platform leader validates a technique, and the durable stock stories form in the layer that supplies it to everyone else. Whether CXL's near-zero deployment share closes toward its 90%-capable installed base is the number that decides if this is the next such layer.
Where it meets the Closelooknet frameworks
This is part two of a pair — the concept is unpacked at Tokens per Watt in the 101, and our cut of the first article lives at the inference P&L entry. The architecture race lands on layers the Rubin Build-Out 100 already tracks — HBM memory, high-speed interconnects, AI factory systems — and on the memory wall thesis: when memory cannot scale with compute, the premium migrates to whatever moves data instead. Proprietary rack or open standard, both answers concentrate value in the plumbing.
Closelooknet keeps this as a market-diary observation, not a recommendation — the signal is where the architecture settles, not a call on Nvidia, Marvell or any single name.
Worth a Read points you to another writer's published work; the synthesis above, and any errors in it, are Closelooknet's, not the source's. Closelooknet publishes a market diary, not investment advice — circumstances differ; consult a licensed advisor before acting.